Embodiments of the present disclosure relate to a semiconductor device and a method for forming the same, and more particularly, to a semiconductor device having an N-rich liner nitride film, and a method for forming the same.
As the degree of integration of a semiconductor device increases, a channel length of a transistor gradually decreases. However, the reduction of the channel length of the transistor may cause a Drain Induced Barrier Lowering (DIBL) phenomenon, a hot carrier effect, and a short channel effect such as punch-through. In order to address such issues, a variety of methods have been introduced by many developers and companies. Such methods include a method for reducing the depth of a junction region, a method for increasing a channel length by forming a recess in a channel region of a transistor, and the like.
However, as the degree of integration of a semiconductor memory device has come close to Gigabits, even smaller-sized transistors are being manufactured. However, in a semiconductor device that uses a planar transistor in which a gate electrode is formed over a semiconductor substrate and a junction region is formed at both sides of the gate electrode, although the channel length is scaled down, it is difficult to fabricate a device having a small enough unit cell size. In order to solve the above-mentioned problems, a gate structure has developed from a recess gate structure to a buried gate structure.
When a gate adjacent to a main gate of a buried gate structure repeatedly operates, a row hammer phenomenon occurs. As a result, data stored in a storage node contact plug of the main gate is distorted.